1. Field of the Invention
The present invention relates to a method of manufacturing a transistor having a structure that prevents the potential of a support substrate under a buried insulating film from greatly affecting the characteristics of a transistor formed on a SOI wafer. In particular, the present invention relates to a so-called source-body-tie transistor in which a source-body-tie region is provided in the vicinity of a source region of a transistor.
2. Description of the Related Art
FIGS. 5A to 5D and FIGS. 6A to 6C illustrate a method of manufacturing a conventional SOI transistor, and FIGS. 7A and 7B are a structural plan view and a cross-sectional view of the conventional SOI transistor. Herein, a transistor is formed by using a wafer in which a P-type semiconductor film 51 is formed on a P-type support substrate via a buried insulating film. The conventional SOI transistor is formed in the semiconductor film 51 in a region surrounded by a LOCOS 58 reaching the buried insulating film as shown in FIGS. 7A and 7B, and each transistor is completely isolated by the LOCOS 58. In the case of an N-type transistor, since the semiconductor film 51 is of a P-type, a transistor is formed by implanting N-type ions into source/drain regions 64 and 76. On the other hand, in the case of a P-type transistor, a transistor is formed by implanting N-type ions into the semiconductor film 51 surrounded by the LOCOS 58, and implanting P-type ions into source/drain regions 63 and 75 under the condition that the semiconductor film 51 is kept in an N-type. According to the manufacturing method, as shown in FIGS. 5A to 5D, patterning and etching are conducted first so as to imprint an alignment mark on a wafer and a thermal oxide film 54 is formed, and a resist 56 is applied thereto. Then, alignment and exposure to light are conducted, and patterning for the purpose of implanting a well is conducted. Next, ions are implanted using the resist 6 as a mask to form a well 55. At this time, the energy of ion implantation is controlled so that the semiconductor can have the peak of a concentration distribution. Then, a heat treatment is conducted, whereby the implanted ions are activated and diffused. Then, a nitride film 57 is formed, patterned, and thermally oxidized to form a LOCOS 58. At this time, thermal oxidation is conducted so that the LOCOS 58 reaches the buried insulating film 52. After forming the LOCOS 58, a gate oxide film 59 is formed, a gate electrode 60 is formed, and ions are implanted into source/drain regions 63, 64, 75 and 76 of the transistor and source-body-tie regions 61 and 62, whereby an interlayer insulating film 70 is formed. The interlayer insulating film 70 is patterned and etched to form contacts of the gate electrode 60, the source/drain regions 63, 64, 75 and 76, and the source-body-tie regions 61 and 62.
The insulating film 52 is disposed between the support substrate 53 and the semiconductor film 51, so that the potential of the support substrate 53 is floated. In the SOI transistor, the potential of the support substrate 53 affects the characteristics of a transistor, so that it is required to fix the potential of the support substrate 53. The potential of the support substrate 53 is set as follows: the support substrate 53 is attached to a conductive base by a conductive adhesive when being mounted in a package, and the potential is taken from the base. Generally, the support substrate is connected to a ground terminal or a power source voltage terminal.
There is also another method of taking the potential of the support substrate side from the semiconductor film side. Specifically, a through-hole is provided so as to reach a part of the support substrate 53 through the semiconductor film 51 and the buried insulating film 52, thereby taking a potential. In this case, in the same way as in the method of taking a substrate potential of a bulk transistor, a contact is provided on the periphery of the transistor, and the potential of the support substrate 53 is taken.
According to the conventional method of forming an SOI transistor, since there is a buried insulating film between a support substrate and a semiconductor film, a transistor on the semiconductor film is not electrically connected to the support substrate, and the potential of the support substrate is floated. However, in a complete depletion type SOI transistor and the like, a semiconductor film is entirely depleted in the thickness direction and depletion reaches a buried insulating film. Therefore, the potential of the support substrate greatly affects the characteristics of the transistor, and a change in potential of the support substrate exhibits the same characteristics as that of a back gate effect of a bulk transistor.
Therefore, it is required to fix the potential of the support substrate. Generally, according to the method of fixing the potential of the support substrate, the support substrate is attached to a conductive base by a conductive adhesive when being mounted in a package, and the potential of the base is fixed, whereby the potential of the support substrate is fixed. The potential of the support substrate is connected to a ground terminal or a power source voltage terminal.
In the case where the potential of the support substrate is fixed by the above-mentioned connection method, all the back gate voltages of transistors formed on a semiconductor film on the support substrate become the same. Therefore, either of a P-type or an N-type transistor is supplied with a back gate voltage. For example, it is assumed that an inverter circuit is formed on a wafer composed of a P-type support substrate and a P-type semiconductor film. If it is assumed that the potential of the support substrate is set at a ground potential, the state of an N-type transistor of the inverter circuit becomes equal to the state where a back gate voltage is not supplied; however, the state of a P-type transistor thereof becomes equal to the state where a back gate voltage equivalent to a power source voltage is applied. Therefore, even if a threshold voltage and a current driving ability are combined in a circuit design, the threshold voltage of a transistor changes to a power source voltage, which brings about a change in timing of a circuit and variation in a driving ability.
Particularly in a voltage regulator and a voltage detector, even if a power source voltage is changed, it is required that a constant voltage is continuously output and constant voltage detection is kept. In the case where the above-mentioned SOI transistor is used in such an IC, there occurs a problem such that an output voltage fluctuates due to the fluctuation of a power source voltage, and a detection voltage fluctuates.
Furthermore, as a method of taking a potential of a support substrate side from a semiconductor film side, there is a method of taking a potential by providing a through-hole that reaches a part of the support substrate through a semiconductor film and a buried insulating film. In this case, a through-contact is provided in the vicinity of a transistor, and a power source voltage terminal is connected to a ground terminal to fix the potential of the support substrate. However, an original SOI device has a latch-up free structure. Therefore, it is not required to provide a guard ring of a transistor, which has the effect of reducing an area. However, according to a method of providing a through-contact on the periphery of a transistor so as to fix the potential of the support substrate, the effect of reducing an area of an SOI device is decreased.
Furthermore, according to the manufacturing method of providing a through-contact on the periphery of a transistor so as to fix the potential of a support substrate, it is required to form a through-hole that reaches a part of the support substrate through a semiconductor film and a buried insulating film, resulting in increase of the number of processes.
Furthermore, in an SOI transistor, there is a transistor in which a support substrate is considered as a gate electrode, and a buried insulating film is considered as a gate oxide film. Therefore, in a P-type transistor supplied with a back gate voltage as in an inverter circuit in the above-mentioned example, when a power source voltage is increased, a channel is formed at the interface of a semiconductor film and a buried insulating film, which disadvantageously allows a current to flow therethrough.
Therefore, with the foregoing in mind, it is an object of the present invention to provide a semiconductor integrated circuit in which even if the potential of a support substrate is fixed, a timing of a circuit is not changed and a driving ability is not varied.
According to the present invention, there is provided a method of manufacturing a semiconductor integrated circuit in which a CMOS transistor is formed on a semiconductor film of a first conductivity provided on a support substrate of a first conductivity via a buried insulating film, including:
forming a contact hole in a source-body-tie region adjacent to a body region under a source region and a gate region of a transistor so that the contact hole reaches a part of the support substrate through the semiconductor film and the buried insulating film on the support substrate, together with alignment marks;
forming a thermal oxide film on an inner side of the contact hole on the semiconductor film;
forming an impurity region of a second conductivity in a region where a transistor of a first conductivity is to be formed, which reaches the buried insulating film on the semiconductor film;
forming an impurity region of a second conductivity in a portion on the support substrate and opposing the impurity region of a second conductivity with respect to the insulating film;
forming a gate oxide film, a gate electrode, a source region, and a drain region after separating elements, and forming an interlayer insulating film;
forming contacts of the source region and the drain region, and simultaneously, etching the interlayer insulating film so as to be concentric with the contact hole and to have a size surrounding the contact hole; and
forming wiring on the interlayer insulating film.
According to the above-mentioned method of the present invention, in a transistor formed on a semiconductor film, the potential of a source region becomes the same as that of a support substrate side at a position opposing the transistor with respect to a buried insulating film. This results in a structure in which a transistor of a first conductivity and a transistor of a second conductivity are not supplied with a back gate voltage, and a threshold voltage fluctuates due to the fluctuation of a power source voltage. This structure eliminates the inconvenience that the timing of a circuit is changed and a driving ability is varied. In particular, in a voltage regulator and a voltage detector, an output voltage is prevented from fluctuating due to the fluctuation of a power source voltage, and a detection voltage is prevented from being fluctuated.
Furthermore, in an SOI transistor according to the present invention, there is a transistor in which a support substrate is considered as a gate electrode, and a buried insulating film is considered as a gate oxide film. Therefore, in a P-type transistor supplied with a back gate as in an inverter circuit in the above-mentioned example, when a power source voltage is increased, a channel is formed at the interface of a semiconductor film and a buried insulating film, which disadvantageously allows a current to flow therethrough. However, in the SOI transistor according to the present invention, a back gate is not applied. This eliminates the inconvenience that when a power source voltage is increased, a channel is formed at the interface of a semiconductor film and a buried insulating film, which disadvantageously allows a current to flow therethrough.
Furthermore, in the SOI transistor according to the present invention, a through-contact to a support substrate is provided in a source-body-tie region. Therefore, the area of an SOI device can be effectively reduced. Furthermore, a through-contact according to the present invention is formed simultaneously with the formation of an alignment mark. Therefore, compared with the conventional process of forming a through-contact to a support substrate, there is an effect of reducing the number of processes.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.